Show simple item record

dc.contributor.authorAl-Zawqari, Ali
dc.contributor.authorHommos, Omar
dc.contributor.authorAl-Qahtani, Abdulhadi
dc.contributor.authorFarhat, Ali
dc.contributor.authorBensaali, Faycal
dc.contributor.authorZhai, Xiaojun
dc.contributor.authorAmira, Abbes
dc.date.accessioned2018-08-13T08:01:47Z
dc.date.available2018-08-13T08:01:47Z
dc.date.issued2018-02-06
dc.identifier.citationAl-Zawqari, A. et al (2018) 'HD number plate localization and character segmentation on the Zynq heterogeneous SoC', Journal of Real-Time Image Processing, DOI 10.1007/s11554-017-0747-7en
dc.identifier.issn18618200
dc.identifier.doi10.1007/s11554-017-0747-7
dc.identifier.urihttp://hdl.handle.net/10545/622890
dc.description.abstractAutomatic number plate recognition (ANPR) systems have become widely used in safety, security, and commercial aspects. A typical ANPR system consists of three main stages: number plate localization (NPL), character segmentation (CS), and optical character recognition (OCR). In recent years, to provide a better recognition rate, high-definition (HD) cameras have started to be used. However, most known techniques for standard definition (SD) are not suitable for real-time HD image processing due to the computationally intensive cost of processing several-folds more of image pixels, particularly in the NPL stage. In this paper, algorithms suitable for hardware implementation for NPL and CS stages of an HD ANPR system are presented. Software implementation of the algorithms was carried on as a proof of concept, followed by hardware implementation on a heterogeneous system-on-chip (SoC) device that contains an ARM processor and a field-programmable gate array (FPGA). Heterogeneous implementation of these stages has shown that this HD NPL algorithm can localize a number plate in 16.17 ms, with a success rate of 98.0%. The CS algorithm can then segment the detected plate in 0.59 ms, with a success rate of 99.05%. Both stages utilize only 21% of the available on-chip configurable logic blocks.
dc.description.sponsorshipUREP Grant #17-138-2-037 from the Qatar National Research Funden
dc.language.isoenen
dc.publisherSpringeren
dc.relation.urlhttp://link.springer.com/10.1007/s11554-017-0747-7en
dc.rightsArchived with thanks to Journal of Real-Time Image Processingen
dc.subjectNumber plate recognitionen
dc.subjectCharacter segmentationen
dc.subjectHeterogenousen
dc.titleHD number plate localization and character segmentation on the Zynq heterogeneous SoC.en
dc.typeArticleen
dc.identifier.eissn18618219
dc.contributor.departmentQatar Universityen
dc.contributor.departmentUniversity of Derbyen
dc.identifier.journalJournal of Real-Time Image Processingen
dcterms.dateAccepted2017-12-30
refterms.dateFOA2019-02-06T00:00:00Z
html.description.abstractAutomatic number plate recognition (ANPR) systems have become widely used in safety, security, and commercial aspects. A typical ANPR system consists of three main stages: number plate localization (NPL), character segmentation (CS), and optical character recognition (OCR). In recent years, to provide a better recognition rate, high-definition (HD) cameras have started to be used. However, most known techniques for standard definition (SD) are not suitable for real-time HD image processing due to the computationally intensive cost of processing several-folds more of image pixels, particularly in the NPL stage. In this paper, algorithms suitable for hardware implementation for NPL and CS stages of an HD ANPR system are presented. Software implementation of the algorithms was carried on as a proof of concept, followed by hardware implementation on a heterogeneous system-on-chip (SoC) device that contains an ARM processor and a field-programmable gate array (FPGA). Heterogeneous implementation of these stages has shown that this HD NPL algorithm can localize a number plate in 16.17 ms, with a success rate of 98.0%. The CS algorithm can then segment the detected plate in 0.59 ms, with a success rate of 99.05%. Both stages utilize only 21% of the available on-chip configurable logic blocks.


Files in this item

Thumbnail
Name:
Zhai_2018_HD_number_plate_loca ...
Size:
843.7Kb
Format:
PDF
Description:
Author Accepted Manuscript

This item appears in the following Collection(s)

Show simple item record